6.1
Processor configuration

A register is a small amount of computer memory that can hold 1 word of data (32 or 64 bits in a typical pc)

Buses are the collections of wires that convey data from one part of the CPU to another.   They link the the microprocessor to the primary memory, (RAM and ROM) and the cache.

Structure of the CPU

As we have seen the CPU consists of the microprocessor and the Immediate Access Store (IAS).

The microprocessor in turn consists of the Control Unit (CU) and the Arithmetic and Logic Unit (ALU). Inside the CU are two important registers the Current Instruction Register (CIR) and the Sequence Control Register (SCR or program counter ). Inside the ALU is another important register known as the accumulator . These registers are important in the execution of a stored computer program.

 An additional register, the interrupt register is used to store information about processes waiting to catch the attention of the CPU ( see below )

The accumulator holds data transferred from the memory, the results of calculations within the CPU and data that is being transferred back to memory.

The instruction register (= CIR - current instruction register) holds the currently executing instruction from the program (held in main memory , perhaps with some parts in cache memory ).

The program counter (= SCR - sequence control register) holds the address of the next instruction to be executed.

This is a very simple model of the CPU but it is all you need to know for the IB programme.

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The Machine Instruction Cycle

Sometimes known as the Fetch-Execute, Fetch-Execute-Decode or even the Fetch-Execute-Decode-Store cycle, it describes the main steps to be taken in the execution of machine language instructions and operates as follows:

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Interrupt register

An interrupt is a signal generated by a peripheral or application program to tell the operating system that some type of service is required.  For example, a printer is offline or out of paper, or some application has just sent a request to save a file.

These signals are kept in the register and, just before the next instruction is fetched from memory, the register is checked to see if there are any requests that need servicing.  Different interrupts have different levels of priority (some get serviced before others), so that, should a low priority interrupt be generated during a high priority task, the low priority interrupt will have to wait until the high priority task completes.  Some interrupts can be masked others are non-maskable .  A mask is a bit-wise operation, suppose the interrupt register has the following status:

Buses

The main types of bus are the address bus and the data bus .  In many designs there is a control bus which tells the data bus which way it is moving data (from main store to cache, Accumulator to main store and so on).  When a microprocessor is described as operating at 500 MHz, for example, this means that 500 million instructions can be carried out by the microprocessor in a second.

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related: [ Topic 6 home | next: magnetic disc storage ]

Builds on Topic 3.2 architecture.

See an Animated Flash Demo of the Fetch-Execute Cycle (opens in new browser window).

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